Alumni
Alumni
Dongkyu Park
Thesis Topic High-speed data path, 10Gps Transceiver
Current affiliation Qualcomm, San Diego
E-mail dongkyupark at gmail.com
Seokryong Yoon
Thesis Topic Low power SoC Design, High-speed I/O
Education B. S. in Electronics Engineering in Korea University
Current affiliation LG Electronics
E-mail wangyoon at hanmail.net
Seoksoo Yoon
Thesis Topic 10Gbps Transceiver, Multi-GHz Microprocessor
Education B. S. in Electronics Engineering in Korea University
Current affiliation Kim & Chang
E-mail yoon9649 at gmail.com
Jinhan Kim
Thesis Topic Mixed Mode IC Design, PLL/DLL
Education B. S. in Electronics Engineering in Korea University
Current affiliation Samsung Electronics
E-mail jh34.kim at samsung.com
Wonho Park
Thesis Topic
Current affiliation Pluribus Networks, Palo Alto
E-mail wonho8002 at hotmail.com
Dongsuk Shin
Thesis Topic Digital DLL
Current affiliation NVIDIA
E-mail dshin28 at vt.edu
Wookkee Han
Thesis Topic Flash Memory
Current affiliation Samsung Electronics
E-mail Igpusan at hanmail.com
Janghoon Song
Thesis Topic Dynamic voltage scaling (DC-DC converter)
Current affiliation Google, Korea
E-mail skykong at hanmail.com
Pulkit Jain
Intern Topic Over sampling transceiver
Current affiliation Intel, Oregon
Sunghoon Ahn
Thesis Topic Spread spectrum clock generator
Current affiliation SK Hynix
E-mail sunghoon.ahn at gmail.com
Jimin Shin
Thesis Topic Wide-Range PLL for 2Gbps Transceiver for Flat Panel Display
Current affiliation Samsung Electronics
E-mail jiminshin at gmail.com
Inho Lee
Thesis Topic A Self-bias Frequency Synthesizer with a Coarse Tuning Loop for
High-Speed Data Transceiver
Current affiliation
E-mail lino29 at hanmail.net
Kyunghoon Chung
Thesis Topic A Low-Jitter CMOS DLL-Based Frequency Multiplier with Self-Calibration
Current affiliation Samsung Electronics
E-mail chungkh38 at naver.com
Amit Mittal
Thesis Topic 64/-64b Encoder/Decoder
Current affiliation Cadence, Austin TX
Hyunsoo Chae
Thesis Topic A Wide-Range CMOS All-Digital Multiphase DLL with Supply Noise Tolerance
Current affiliation Cadence, Austin TX
E-mail pixy07 at hotmail.com
Hyunsoo Chae
Thesis Topic A Digitally Controlled DC-DC Buck Converter for Embedded CPU
Current affiliation Samsung Electronics
E-mail euraka7120 at hanmail.net
Jinwoo Kim
Thesis Topic 6-bit Low-Power Flash ADCs for Wideband Communication Systems
Current affiliation Samsung Electronics
E-mail jw8719.kim at samsung.com
Jinseock Ma
Thesis Topic Spin transistor using perpendicular magnetization
Current affiliation Samsung Display
E-mail jinseock at gmail.com
Daejung Shin
Thesis Topic 2Gbps Transmitter for Flat Panel Display
Current affiliation Doestek Co.
E-mail sdaejung at doestek.co.kr
Ja-Beom Koo
Thesis Topic High Resolution ODT Calibration Method with PVY Variation Immunity
Current affiliation Assistant Professor of Cooper Union. New York
E-mail kjbjn at hanmail.net
Sunghwa Ok
Thesis Topic A DLL-based Multiphase Clock Generator with PVT variation tolerance
Current affiliation SK Hynix
E-mail sunghwa.ok at hynix.com
Taeyoon Kim
Thesis Topic A Study on the design of Low-power High-resolution Sigma_delta A/D converter for Complex Sensor
Current affiliation LG Electronics
E-mail daloveme at nate.com
Yongtae Kim
Thesis Topic A 20Gbps Inductorless Coarse-Fine Tunable Adaptive Equalizer
Current affiliation Intel, Santa Clara
E-mail fcore4 at gmail.com
Sangdon Jung
Thesis Topic 20Gb/s Transmitter for Backplane
Current affiliation Samsung Electronics
E-mail sangdon.jung at samsung.com
Hyunho Chu
Thesis Topic A Voltage-mode DC-DC Converter with a Novel Oscillator and Ramp Generator and a
Soft-start Circuit
Current affiliation Samsung Electronics
E-mail huingeuneul at hanmail.com
Kisoo Kim
Thesis Topic Temperature sensor, Clock distribution
Current affiliation SK hynix
E-mail kisoo.kim at hynix.com
Woonhyung heo
Thesis Topic Wireless Transceiver
Current affiliation Samsung Electronics
E-mail lordhuhu at naver.com
Phi-Hung Pham
Thesis Topic Design and Implementation of Circuit-Switched Network-on-Chip with Dynamic
Path-Setup Scheme
Current affiliation Sodick America Coporation, USA
E-mail hungpp at gmail.com
Young-Ho Kwak
Thesis Topic Design of a 220Gb/s Clock and Data Recovery with Unlimited Phase Shifting Algorithm
Current affiliation Samsung Electronics
E-mail yh.kwak at gmail.com
Moo-Young Kim
Dissertation Topic A 10--bit 100-MS/s Pipelined A/D Converter Using Input-Swapped Opamp Sharing and Self
Calibrated V/I Converter
Current affiliation Samsung Electronics System LSI
E-mail myoung81.kim at samsung.com
Dong Seok Kim
Thesis Topic A 0.06% Output Voltage Ripple PWM Regulated Charge Pump and SIMO Buck Converter in CCM
Mode with Half-switching Scheme for Mobile Applications
Current affiliation SK Hynix
E-mail dgtsdt at naver.com
Jabeom Koo
Thesis Topic Frequency-to-Digital Converter Based Temperature Sensor with Process Variation Compensation
Current affiliation SK Hynix
E-mail krazn at gmail.com, jabeom1.koo at SK.com
Debashis Dhar
Thesis Topic A 4Gbps Output Driver with a TDC-Based Skew Compensation Technique
Current affiliation Technische Universiteit Eindhoven
E-mail d.dhar at tue.nl
Kyeong-min Kim
Thesis Topic 11.2Gbps LVDS Receiver with Wide Input Range Comparator
Current affiliation SK Hynix
E-mail anribabar at hanmail.net
Inhwa Jung
Thesis Topic Wide-Range Receiver Design without Using Reference Clock Source
Current affiliation SK Hynix
E-mail pureih at gmail.com
Jihwan Kim
Thesis Topic A Wide Input Range Hybrid DC-DC Conversion System and a SIFO Rectifier for Energy Harvesting
Current affiliation SK Hynix
E-mail jihwan2.kim at sk.com
Hong-Seung Yang
Thesis Topic A 720Mbps Bi-directional Receiver to Displayportv. 1.2 Auxiliary Channel
Current affiliation Samsung Electronics
E-mail nillily21 at gmail.com
Hyun Woo Lee
Thesis Topic A 1.6V 1.4Gb/s/pin Consumer DRAM with Self-Dynamic Voltage Scaling Technique
Current affiliation Micron Technology, USA
E-mail richduck.james at gmail.com
Byung-Wook Ahn
Thesis Topic Interconnect Reliability Degradation Monitoring Circuitry
Current affiliation Qualcomm
E-mail bahn at qti.qualcomm.com
Nam-Wook Cho
Thesis Topic A 3.125Gb/s all-digital clock and data recovery circuit for XAUI interface
Current affiliation LG Display
E-mail skadn71 at gmail.com
Minyoung Song
Thesis Topic Digitally-Assisted Clock Generators for Display Applications
Current affiliation Assistant Professor of DGIST
E-mail smylestyle at gmail.com
Soo-Bin Lim
Thesis Topic An 800Mb/s/pin DLL-Based Data Self Aligner for Through Silicon Via (TSV) Interface
Current affiliation Micron Technology, USA
E-mail hegridv at nate.com
Jeong Lee
Thesis Topic A Bi-directional Transceiver for Display Port v1, 2 Auxiliary Channel
Current affiliation Siliconworks
E-mail nanleecida at gmail.com
Sanghun Lee
Thesis Topic Current-Mode DC-DC Buck Converter with Leading Edge Blanking Circuit for Reliable
Current sensing
Current affiliation Dongbu hiTek
E-mail tktn1221 at naver.com
Xu Kuo
Thesis Topic A Study of Restricted Isometry Property for Gaussian Random Matrices
Current affiliation Dalian Naval Academy, China
E-mail xukuo2006 at sina.com
Younghun Baek
Thesis Topic A 5Gb/s/pin Pseudo-differential Signaling Transceiver for Graphics DRAM interface
Current affiliation SK Hynix
E-mail bhyboy1 at hanmail.net
Jung-Taek You
Thesis Topic A 1.7Gb/s/ch High-Speed Single Ended On-Chip Signaling for Global I/O in Memory
Current affiliation SK Hynix
E-mail jungtaek.you at SK.com
Jungmoon Kim
Thesis Topic Circuit Design Techniques for Low-power Energy Harvesting Systems
Current affiliation Samsung Electronics
E-mail jungmoon00 at gmail.com
Junyoung Song
Thesis Topic Reference-less Receiver Design with Fast Frequency Acquisition Time for Display Interface
Current affiliation Assistant Professor of INU
E-mail songjy.82 at gmail.com
Hokyu Lee
Thesis Topic A 6-bit 2.5-GS/s Time-Interleaved SAR ADC using Resistor Array Sharing DAC for Wireless
Communication Applications
Current affiliation Samsung Electronics
E-mail g2jjang at gmail.com
Heejun Kim
Thesis Topic A Digitally Controlled Dual Mode Low-Dropout (LDO) Regulator for Efficiency Enhancement
Current affiliation SK Hynix
E-mail khjaisl at gmail.com
Changsung Choi
Thesis Topic A Sub-harmonically Injection-locked PLL with Cascaded DLL for Multi-phase Injection
Current affiliation Samsung Electronics
E-mail hayanpie at gmail.com
Jayoung Kim
Thesis Topic A 250Mb/s to 6Gb/s Reference-less Clock and Data Recovery Circuit Clock Frequency Multiplier
and Gear-up Controller
Current affiliation SK Hynix
E-mail likeoran15 at naver.com
GyungMin Kim
Thesis Topic A Sub-Sampling PLL-based Spread Spectrum Clock Generator with Auto Calibration
Current affiliation Meta, USA
E-mail s2hobb at naver.com
Jaeseon Shim
Thesis Topic Coil alignment assistance in mobile devices using magnetic induction wireless charging
Current affiliation Renesas
E-mail jssim520006 at korea.ac.kr
Youngtae Kim
Thesis Topic A 3Gb/s High-Speed True Random Number Generator Using Metastability of Comparator
Current affiliation SK Hynix
E-mail kyt4585 at hanmail.net
Sun Myung Choi
Thesis Topic A 5Gb/s Full-rate Reference-less Clock and Data Recovery using frequency detector measuring
data width
Current affiliation SK Hynix
E-mail sunmyung.choi at sk.com
Sewook Hwang
Thesis Topic Cost-effective and Low-power Design Techniques for Display Interfaces
Current affiliation Butterfly Network, Guilford CT
E-mail sewook.hwang at gmail.com
Sang-Geun Bae
Thesis Topic Design and Calibration of Spread-Spectrum Clock Generators Considering PVT Variations
Current affiliation SK hynix
E-mail abezang at naver.com
Dongyoon Kim
Thesis Topic Memory I/O - BOST de-skewing circuit
Current affiliation Samsung Electronics
E-mail netkdy304 at naver.com
Yangho Seo
Thesis Topic Digital LDO
Current affiliation SK hynix
E-mail rabitoki at naver.com
Doyoun Kim
Thesis Topic A Collapse Ring Oscillator PUF in NTV
Current affiliation Samsung Electronics
E-mail dkdlzosdo at gmail.com
Aurangozeb
Thesis Topic High Speed ADC Calibration
Current affiliation Synopsys, Canada
E-mail aurangoz at ualberta.ca
Sungjun Moon
Thesis Topic MIPI C-PHY
Current affiliation Samsung Electronics
E-mail sungjunmon at hanmail.net
Sangsu Lee
Thesis Topic A near-threshold all-digital pll with a bootstrapped DCO using low-dropout regulator for mitigating
PVT-variation
Current affiliation Samsung Electronics
E-mail tremtorque at gmail.com
Jinseok Oh
Thesis Topic A reconfigurable four-output switched-capacitor DC-DC converter
Current affiliation SK hynix
E-mail skhy.2066352 at sk.com
Byunggun Joung
Thesis Topic Differentiator-assisted feedback techinque using edge-pursuit comparator for fast transient
response of DC DC buck converter
Current affiliation Ph.D. at Purdue University
E-mail jbg1324 at gmail.com
Choonghwan Lee
Thesis Topic A 1-to-14GHz Fast Locking All-Digital PLL through LF Analysis for DVFS Systems
Current affiliation Samsung Electronics
E-mail cma1114 at naver.com
Jaehun Jun
Thesis Topic Digital Cell Library and Digitally Assisted PLL & LDO for Near-Threshold Voltage Operation
Current affiliation LG Display
E-mail ranier@paran.com
Minseob Shim
Thesis Topic Energy harvesting system and energy efficient comparator for wireless sensor nodes
Current affiliation Assistant Professor of GNU
E-mail sms8520@gnu.ac.kr
Minho Park
Thesis Topic Resistor-Free Transmitter with Temperature Compensation for Low-Power DRAM
Current affiliation Siliconworks
E-mail quicknom at naver.com
Eunhee Kim
Thesis Topic A digitally Low-Dropout Voltage Regulator(LDO) Utilizing Adaptive SAR-based Algorithm
Current affiliation SK hynix
E-mail dmsgml1414 at naver.com
Junwon Jeong
Thesis Topic Energy Harvesting Charger and Battery State-of-charge Indicator for Low-Power IoT Devices
Current affiliation Assistant Professor of Sookmyung Women's University
E-mail jjwaisl at gmail.com
Yeonho Lee
Thesis Topic Bit-Efficient Transceiver Design Utilizing Braid Clock Signaling and Enhanced Braid Signaling
Current affiliation Korea Electronics Technonogy Institute
E-mail ylee.adbcs at gmail.com
Youngbog Yoon
Thesis Topic DLL, Deskewing
Current affiliation SK hynix
E-mail yygbog at gmail.com
Junyoung Maeng
Thesis Topic Energy-Efficient Power Management System Design Techniques for Battery-Powered Applications
Current affiliation Samsung Electronics Memory Business
E-mail jym0275 at gmail.com
Yunsoo Park
Thesis Topic A High-Linearity Dynamic Amplifier and Calibration Techniques for High-Speed A/D Converters
Current affiliation Korea Electronics Technology Institute
E-mail yunsoopark613 at gmail.com
Minseob Lee
Thesis Topic A 3-4GHz DCC Using Cost-Effective Vernier Delay Line Time-to-Digital Converter Without
Synchronous Delay Line
Current affiliation SK hynix
E-mail minseop1.lee at sk.comelay Line
Jeewan Lee
Thesis Topic A Wide Range Adaptive Operation Phase Rotator - Based All Digital Delay Locked Loop for
LPDDR5 Interfaces
Current affiliation SK hynix
E-mail swc01014 at naver.com
Wonkee Park
Thesis Topic ADC
Current affiliation Korea Electronics Technology Institute
E-mail wkpark74 at keti.re.kr
Dongju Lim
Thesis Topic Switched-Capacitor-Based DC-DC Converters and ESD protection Circuits for Mobile Applications
Current affiliation SK hynix
E-mail dongju.lim at sk.com
Chaegang Lim
Thesis Topic High-resolution Sensor Readout ICs for V and C Sensing
Current affiliation Samsung Electronics
E-mail inclue at korea.ac.kr
Jaegeun Song
Thesis Topic Design Techniques for Energy-Efficient SAR ADCs
Current affiliation Samsung Electronics
E-mail sjk1375 at gmail.com
Hyunsu Park
Thesis Topic High-Bandwidth Memory Interface Design Techniques using Single-ended Multi-Level Signaling
and Multi-Phase Clocking
Current affiliation SK hynix
E-mail hyunsu1696 at naver.com
Jeongsik Yoo
Thesis Topic Low-Power Memory Interface Scheme using Active Inductor and Hardware Security Circuits for
Internet of Things Applications
Current affiliation Samsung Electronics
E-mail jeongsik.yu at samsung.com
Minsu Jeong
Thesis Topic A study on ultra-fine-pitch high-brightness pixel circuit and driving backplane IC for augmented
reality LCoS micro-display
Current affiliation Raontech
E-mail Minsu.Jeong at raon.io
Changhun Park
Thesis Topic A Reconfigurable SC with VCR-Overlapping Control Scheme Achieving Seamless CRM
Current affiliation SK hynix
E-mail qkrcdkgns at naver.com
Kungryun Yoon
Thesis Topic A 4.5 Gb/s/pin Transceiver with Hybrid ISI and FEXT Equalization Scheme for Next Generation
HBM Interface
Current affiliation Katech
E-mail yky582582 at naver.com
Eunji Lee
Thesis Topic Decoupling Capacitor using Dummy Metal Fill for Power Supply Noise Reduction
Current affiliation Samsung Electronics
E-mail eunji2 at korea.ac.kr
Inho Park
Thesis Topic Energy-Efficient Power Management System for Low-Power Wireless Sensor Nodes
Current affiliation Assistant Professor of Inha University
E-mail inho0726 at gmail.com
Yoonjae Choi
Thesis Topic Energy-Efficient Time-Domain Design Techniques for High-Speed Memory Interfaces
Current affiliation Samsung Electronics
E-mail louischoi at naver.com
Seokwon Jang
Thesis Topic A 14.0-ENOB Third-Order Noise-Shaping SAR ADC Using Closed-Loop Dynamic Amplifer
Current affiliation Samsung Electronics
E-mail addewe951 at naver.com
Jaewon Ryu
Thesis Topic A 4.2-V Input Hybrid Step-Down DC-DC Converter Utilizing High DCR Inductor Achieving High-
Efficiency With Reduced Inductor Current and Switching Stress
Current affiliation Samsung Electronics
E-mail jwyou2 at korea.ac.kr
Hyoshin Kang
Thesis Topic A 13 Gb/s NRZ Recevier Using Data Edge Sampling for Memory Interfaces
Current affiliation SK hynix
E-mail worldkang97 at naver.com
Jonghyuck Choi
Thesis Topic Energy-Efficient Single-Ended Transceiver and Equalizer Design Technique for High-Speed
Memory Interfaces
Current affiliation Samsung Electronics
E-mail cjh93 at korea.ac.kr
Jincheol Sim
Thesis Topic Design and Analysis of High-Speed Wireline Transceivers Utilizing Multi-Bit per Symbol Signaling
Techniques for Short-Reach Links
Current affiliation Samsung Electronics
E-mail cheol0428 at naver.com
Yohan Choi
Thesis Topic Design of high-resolution delta-sigma ADCs using operational and dynamic amplifiers
Current affiliation Samsung Electronics
E-mail cyvoid1991 at gmail.com
Seokjin Kim
Thesis Topic A Highly Integrated Continuously-Scalable-Conversion-Ratio Resonant Switched-Capacitor
Converter for 3D Packaging
Current affiliation SK hynix
E-mail seokjin820 at gmail.com
Seokhee Han
Thesis Topic A High-Efficiency 12V-to-1V Fully Soft-Charging Hybrid Subtraction Mode Converter with Active
Capacitor Voltage Balancing Control
Current affiliation SK hynix
E-mail lemian2 at korea.ac.kr